News Coverage

(May 15, 2025) Semiconductor Engineering - All of the legacy companies chose the same path: bolt a matrix accelerator onto the cash cow processor and declare that the legacy core still reigns supreme. Three years later staring at the reality of transformers, they declared the first-generation accelerator obsolete and invented a second one that repeated the same shortcomings of the first accelerator. And now faced with the struggles of the 2^nd iteration hardwired accelerator having also become obsolete in the face of continuing evolution of operators (self-attention, multiheaded self-attention, masked self-attention, and more new ones daily) they either have to double-down again and convince internal and external stakeholders that this third time the fixed-function accelerator will solve all problems forever; or admit that they need to break out of the confining walls they’ve built for themselves and instead build a truly programmable, purpose-built AI processor.

(SemiWiki) April 28, 2025 - The takeaway is that a model as advanced as BEVDepth, supported by a key function written in CUDA, was easily mapped over to the Quadric platform and ran twice as fast as the same function running on an Nvidia chip at substantially lower power. Faster of course because Chimera is designed for IoT inferencing rather than heavy-duty training. Much lower power for the same reason. And programming is easily managed by an OEM or Tier1 C++ programmer.

(Edge AI and Vision Alliance) April 21, 2025 - The Chimera processor solves this problem – it’s easy to integrate and fully programmable, handling all operations in one unified stream. This allows us to run any AI model, future-proofing your investment even when models change.

So how does the algorithm porting team handle porting of Voxel Pooling onto an embedded NPU if the function is not represented in the graph interchange format supported by the NPU vendor’s graph compiler toolchain? With other NPUs, the team is stuck – there’s simply no way to get that important new function ported quickly to the NPU, and very likely it can never be ported. BEVdepth might simply not be able to run on the platform at all.

(March 11, 2025) - XTECH - 米新興のQuadric（クアドリック）はエッジAI（人工知能）向けの半導体技術を強みに、日本で自動車や小売り分野の顧客を開拓する。デンソーと車載AI半導体のIP（回路情報）コアを共同開発するほか、2025年1月に日本法人を設立しマーケティングや顧客支援を強化した。様々なAIモデルに柔軟に対応できる特徴を生かし、自動車や小売り分野の機器メーカーなどに独自のIPコアを提供する。

(March 6, 2025) Junko's Tech Probe - Japanese IC vendors lost their way by sticking too long to in-house fabs, insisting on home-grown MCUs and tool sets. But rapid advancements in AI could nudge Japan toward embracing "buy" over "make."

The autonomous driving sector has seen an influx of investment in the past year after nearly a decade in the doldrums. “We’ve been in this space about seven years now, and the last 12 months of activity dwarfs everything I’ve seen,” says Veerbhan Kheterpal, co-founder and CEO at Quadric, a startup developing processor architecture for the AI chips needed for self-driving cars.

(February 18, 2025) SemiWiki - 2024 was a year of tremendous momentum building for Quadric.  We introduced and began customer deliveries of the 2^nd generation of our Chimera GPNPU processor, which now scales to over 800 TOPs.  We also dramatically expanded the size of our model zoo (available in our online DevStudio at our quadric.io website) from only 20 models at the start of the year to over 200 by the close of 2024 thanks to the rapid maturation of our compiler stack.

(February 17, 2025) Semiconductor Engineering - The rapid emergence of Vision Language Models (VLMs) in the automotive/ADAS sector is one of those under-the-public-radar changes shaking up a different industry...Vision Language Models are multimodal AI systems built by combining a large language model (LLM) with a vision encoder, giving the LLM the ability to “see.”

(January 16, 2025) - Semiconductor Engineering - True, the idea of a partitioned (programmable core) + (MAC tensor engine) worked quite well in 2021 to run classic CNNs from the Resnet era (circa 2015-2017). But we have argued that modern CNNs and all new transformers are comprised of much more varied ML network operators – and far more complex, non-MAC functions – than the simple eight (8) operator Resnet-50 backbone of long ago.